Trace: • ESP32S Data Sheet
ESP32S Data Sheet
ESP32S Data Sheet
This document provides users with the technical specifications of the ESP32S module.
Disclaimer and copyright notice
The information in this article, including the URL address for reference, is subject to change without notice.
The document is provided “as is” without any guarantee responsibility, including any guarantees for merchantability, suitability for specific purposes, or non-infringement, and any guarantees mentioned elsewhere in any proposals, specifications or samples. This document does not take any responsibility, including the responsibility for infringement of any patent rights caused by using the information in this document. This document does not grant any license for the use of intellectual property rights by estoppel or other means, whether express or implied.
The Wi-Fi Alliance member logo is owned by the Wi-Fi Alliance.
The Bluetooth logo is a registered trademark of Bluetooth SIG.
All brand names, trademarks and registered trademarks mentioned in this article are the property of their respective owners, and it is hereby declared.
Attention
Due to product version upgrades or other reasons, the contents of this manual may change. Shenzhen Anxinke Technology Co., Ltd. reserves the right to modify the contents of this manual without any notice or prompt. This manual is only used as a guide. Shenzhen Anxinke Technology Co., Ltd. makes every effort to provide accurate information in this manual. However, Shenzhen Anxinke Technology Co., Ltd. does not guarantee that the contents of the manual are completely free of errors. All statements and information in this manual And suggestions do not constitute any express or implied guarantee.
1. Overview
ESP32-S is a general-purpose WiFi-BT-BLE MCU module with powerful functions and a wide range of uses. It can be used in low-power sensor networks and demanding tasks, such as voice encoding, audio streaming, and MP3 decoding.
The core of this module is the ESP32 chip, which is scalable and adaptive. The two CPU cores can be individually controlled or powered on. The adjustment range of the clock frequency is from 80 MHz to 240 MHz. The user can cut off the power of the CPU and use the low-power coprocessor to continuously monitor the status changes of peripherals or whether certain analog quantities exceed the threshold. ESP32 also integrates a wealth of peripherals, including capacitive touch sensors, Hall sensors, low-noise sensor amplifiers, SD card interface, Ethernet interface, high-speed SDIO/SPI, UART, I2S and I2C, etc.
ESP-WROOM-32 integrates traditional Bluetooth, low energy Bluetooth and Wi-Fi, and has a wide range of uses: Wi-Fi supports a wide range of communication connections, and it also supports direct connection to the Internet through a router; Bluetooth allows users to connect to mobile phones Or broadcast BLE Beacon to facilitate signal detection. The sleep current of the ESP32 chip is less than 5uA, making it suitable for battery-powered wearable electronic devices. ESP-WROOM-32 supports a data transmission rate of up to 150 Mbps, after passing through a power amplifier, the output power can reach 22 dBm, which can achieve the widest range of wireless communication. Therefore, this chip has industry-leading technical specifications and has the best performance in terms of high integration, wireless transmission distance, power consumption, and network connectivity. The operating system of ESP32 is freeRTOS with LWIP, and TLS 1.2 with hardware acceleration is built in. The chip also supports OTA encryption upgrades, and developers can continue to upgrade after the product is released. The software release is included in the ESP32 bug bounty program, and users can report any bugs to bug-bounty@espressif.com.
Users can send feedback on modules, chips, APIs and firmware to support@aithinker.com.
Table 1 lists the product specifications of ESP32S.
| Category | Item | Product Specifications |
| Wi-Fi | Standard | FCC/CE |
| Protocol | 802.11 b/g/n/d/e/i/k/r (802.11n, speed up to 150 Mbps) | |
| A-MPDU and A-MSDU aggregation, support 0.4us protection interval | ||
| Frequency range | 2.4~2.5 GHz | |
| Bluetooth | Protocol | Compliant with Bluetooth v4.2 BR/EDR and BLE standards |
| RF | NZIF receiver with -98 dBm sensitivity | |
| Class-1, Class-2 and Class-3 transmitters | ||
| AFH | ||
| Audio | CVSD and SBC Audio | |
| Hardware | Module interface | SD card, UART, SPI, SDIO, I2C, LED PWM, motor PWM, I2S, I2C, IR |
| GPIO, capacitive touch sensor, ADC, DACLNA preamplifier | ||
| On-chip sensor | Hall sensor, temperature sensor | |
| On-board clock | 26 MHz crystal oscillator, 32 kHz crystal oscillator | |
| Operating voltage | 2.2~3.6V | |
| Operating current | Average: 80 mA | |
| Operating temperature range | -40°C~+85°C 1) | |
| Ambient temperature range | Normal temperature | |
| Package size | 18 mm x 20 mm x 3 mm | |
| Software | Wi-Fi Mode | Station/softAP/SoftAP+station/P2P |
| Security Mechanism | WPA/WPA2/WPA2-Enterprise/WPS | |
| Encryption type | AES/RSA/ECC/SHA | |
| Firmware upgrade | UART download/OTA (download and write firmware via network/via host | |
| Software development | Support cloud server development/SDK for user firmware development | |
| Network Protocol | IPv4, IPv6, SSL, TCP/UDP/HTTP/FTP/MQTT | |
| User configuration | AT+ command set, cloud server, Android/iOS APP |
2. Pin definition
2.1 Pin layout
Figure 1: ESP32S pin size diagram
Table 2: ESP32S module size
| Length | Width | Height | PAD Size (Bottom) | Pin Pitch | Shield Cover Height | PCB Thickness* * |
| 18 mm | 25.5 mm | 2.8 ± 0.1 mm | 0.45 mm x 0.9 mm | 1.27 mm | 2 mm | 0.8 ± 0.1 mm |
==== 2.2 Pin description ====
ESP32S has 38 pins in total, see Table 3 for specific description.
Table 3: ESP32S pin definition
| Name | Serial Number | Function |
| GND | 1 | Ground |
| 3V3 | 2 | Power Supply |
| EN | 3 | Enable chip, high level active. |
| SENSOR_VP | 4 | GPI36, SENSOR_VP, ADC_H, ADC1_CH0, RTC_GPIO0 |
| SENSOR_VN | 5 | GPI39, SENSOR_VN, ADC1_CH3, ADC_H, RTC_GPIO3 |
| IO34 | 6 | GPI34, ADC1_CH6, RTC_GPIO4 |
| IO35 | 7 | GPI35, ADC1_CH7, RTC_GPIO5 |
| IO32 | 8 | GPIO32, XTAL_32K_P (32.768 kHz crystal oscillator input), ADC1_CH4, TOUCH9, RTC_GPIO9 |
| IO33 | 9 | GPIO33, XTAL_32K_N (32.768 kHz crystal oscillator output), ADC1_CH5, TOUCH8, RTC_GPIO8 |
| IO25 | 10 | GPIO25, DAC_1, ADC2_CH8, RTC_GPIO6, EMAC_RXD0 |
| IO26 | 11 | GPIO26, DAC_2, ADC2_CH9, RTC_GPIO7, EMAC_RXD1 |
| IO27 | 12 | GPIO27, ADC2_CH7, TOUCH7, RTC_GPIO17, EMAC_RX_DV |
| IO14 | 13 | GPIO14, ADC2_CH6, TOUCH6, RTC_GPIO16, MTMS, HSPICLK, HS2_CLK, SD_CLK, EMAC_TXD2 |
| IO12 | 14 | GPIO12, ADC2_CH5, TOUCH5, RTC_GPIO15, MTDI, HSPIQ, HS2_DATA2, SD_DATA2, EMAC_TXD3 |
| GND | 15 | Ground |
| IO13 | 16 | GPIO13, ADC2_CH4, TOUCH4, RTC_GPIO14, MTCK, HSPID, HS2_DATA3, SD_DATA3, EMAC_RX_ER |
| SHD/SD2 | 17 | GPIO9, SD_DATA2, SPIHD, HS1_DATA2, U1RXD |
| SWP/SD3 | 18 | GPIO10, SD_DATA3, SPIWP, HS1_DATA3, U1TXD |
| SCS/CMD | 19 | GPIO11, SD_CMD, SPICS0, HS1_CMD, U1RTS |
| SCK/CLK | 20 | GPIO6, SD_CLK, SPICLK, HS1_CLK, U1CTS |
| SDO/SD0 | 21 | GPIO7, SD_DATA0, SPIQ, HS1_DATA0, U2RTS |
| SDI/SD1 | 22 | GPIO8, SD_DATA1, SPID, HS1_DATA1, U2CTS |
| IO15 | 23 | GPIO15, ADC2_CH3, TOUCH3, MTDO, HSPICS0, RTC_GPIO13, HS2_CMD, SD_CMD, EMAC_RXD3 |
| IO2 | 24 | GPIO2, ADC2_CH2, TOUCH2, RTC_GPIO12, HSPIWP, HS2_DATA0, SD_DATA0 |
| IO0 | 25 | GPIO0, ADC2_CH1, TOUCH1, RTC_GPIO11, CLK_OUT1, EMAC_TX_CLK |
| IO4 | 26 | GPIO4, ADC2_CH0, TOUCH0, RTC_GPIO10, HSPIHD, HS2_DATA1, SD_DATA1, EMAC_TX_ER |
| IO16 | 27 | GPIO16, HS1_DATA4, U2RXD, EMAC_CLK_OUT |
| IO17 | 28 | GPIO17, HS1_DATA5, U2TXD, EMAC_CLK_OUT_180 |
| IO5 | 29 | GPIO5, VSPICS0, HS1_DATA6, EMAC_RX_CLK |
| IO18 | 30 | GPIO18, VSPICLK, HS1_DATA7 |
| IO19 | 31 | GPIO19, VSPIQ, U0CTS, EMAC_TXD0 |
| NC | 32 |-|
| IO21 | 33 | GPIO21, VSPIHD, EMAC_TX_EN |
| RXD0 | 34 | GPIO3, U0RXD, CLK_OUT2 |
| TXD0 | 35 | GPIO1, U0TXD, CLK_OUT3, EMAC_RXD2 |
| IO22 | 36 | GPIO22, VSPIWP, U0RTS, EMAC_TXD1 |
| IO23 | 37 | GPIO23, VSPID, HS1_STROBE |
| GND | 38 | Ground |
====2.3 Strapping pin ====
ESP32 has 6 strapping pins, software can read the value of these 6 bits in the register “GPIO_STRAPPING”.
During the chip power-on reset process, the strapping pin samples the level and stores it in the latch, which is latched as “0” or “1”, and remains until the chip is powered down or closed. Each strapping pin is connected to internal pull-up/pull-down. If a strapping pin is not connected or the connected external circuit is in a high impedance state, the internal weak pull-up/pull-down will determine the default value of the strapping pin input level. To change the value of the strapping bit, the user can apply an external pull-down/pull-up resistor, or use the GPIO of the host MCU to control the level of the strapping pin when the ESP32 is powered on. After reset, the strapping pin has the same function as the normal pin. Refer to Table 4 for the detailed startup mode of configuring strapping pins. Table 4: Strapping pins 2) | Built-in LDO (VDD_SDIO) voltage |||||| | Pin | Default | 3.3V || 1.8V || | MTDI/GPIO12 | pull down | 0 || 1 || | System startup mode |||||| | Pins | Default | SPI Flash boot mode || Download boot mode || | GPIO0 | Pull up | 1 || 0 || | GPIO2 | Drop-down | Irrelevant items || 0 || | During system startup, U0TXD outputs log print information |||||| | Pin | Default | U0TXD flip || U0TXD static || | MTDO/GPIO15 | Pull up | 1 || 0 || | SDIO slave signal input and output timing |||||| | Pin | Default | Falling edge input Falling edge output | Falling edge input Rising edge output | Rising edge input Falling edge output | Rising edge input Rising edge output | | MTDO/GPIO15 | Pull up | 0 | 0 | 1 | 1 | | GPIO5 | Pull up | 0 | 1 | 0 | 1 | ===== 3. Function description ===== This chapter describes the various modules and functions of ESP32S. ==== 3.1 CPU and memory ==== ESP32 contains two low-power Xtensa®32-bit LX6 MCUs. On-chip storage includes: * 448KBytes of ROM, used for program startup and kernel function call * 520 KBytes on-chip SRAM for data and instruction storage * 8KBytes of SRAM in RTC, that is, RTC slow memory, can be accessed by the coprocessor in Deep-sleep mode * 8kBytes of SRAM in RTC, that is, RTC fast memory, can be used for data storage and accessed by the main CPU when RTC starts in Deep-sleep mode * 1kbit EFUSE, of which 256 bits are dedicated to the system (MAC address and chip settings); the remaining 768 bits are reserved for user applications, which include Flash encryption and chip ID ==== 3.2 External Flash and SRAM ==== ESP32 supports up to 4 16 MBytes external QSPI Flash and static random access memory (SRAM), with AES-based hardware encryption Yes, thereby protecting the developer’s programs and data. * ESP32 accesses external QSPI Flash and SRAM through cache. Up to 16 MBytes of external Flash mapped to CPU code space It supports 8-bit, 16-bit and 32-bit access, and executable code. * Up to 8 MBytes of external Flash and SRAM are mapped to the CPU data space, supporting 8-bit, 16-bit and 32-bit access. Flash only Support read operation, SRAM can support read and write operations. ==== 3.3 Crystal oscillator ==== Supports crystal oscillators with frequencies of 40 MHz, 26 MHz and 24 MHz. The accuracy of the crystal oscillator is between ±10 PPM, and the operating temperature range is between -40°C and 85°C. Please select the correct crystal oscillator type when using the download tool. In the circuit design, the ground adjustment capacitors C1 and C2 are added to the input and output terminals of the crystal oscillator, respectively. The value of the two capacitors can be flexibly set, ranging from 6 pF to 22 pF. However, the specific capacitance value can only be determined after matching the overall performance of the entire circuit. Generally speaking, if the frequency of the crystal oscillator is 26 MHz, the capacitance values of C1 and C2 are within 10 pF; if the frequency of the crystal oscillator is 40 MHz, the capacitance values of C1 and C2 are 10 pF<C1, C2<22 pF. The frequency of the RTC crystal oscillator is usually 32 kHz or 32.768 kHz. Due to internal calibration to correct the frequency offset, the frequency of the crystal oscillator may exceed the range of ±20 PPM. When the chip is working in low-power mode, the device should select an external low-speed 32 kHz crystal oscillator clock instead of the internal RC oscillator to obtain an accurate wake-up time. ==== 3.4 Power consumption ==== ESP32 has advanced power management technology that can switch between various power saving modes. * Power saving mode * Active mode: The chip radio frequency is in working condition. The chip can receive, transmit and listen to signals. * Modem-sleep mode: CPU keeps running and the clock can be configured. Wi-Fi/Bluetooth baseband and radio frequency are off. * Light-sleep mode: CPU is suspended. RTC and ULP coprocessors run. Any wake-up event (MAC, host, RTC timer or external interrupt) will wake up the chip. * Deep-sleep mode: Only RTC is in working state. Wi-Fi and Bluetooth connection data are stored in RTC. The ULP coprocessor keeps running. * Hibernation mode: The built-in 8 MHz oscillator and ULP coprocessor are disabled. RTC memory recovery power is cut off. Only one RTC clock timer and certain RTC GPIOs on the slow clock are active. RTC timer or RTC GPIO can wake up the chip from Hibernation mode. * Sleep mode * Associated sleep mode: the power saving mode is switched between Active mode and Modem-sleep mode/Light-sleep mode. The CPU, Wi-Fi, Bluetooth, and radio frequency are periodically woken up as preset to ensure Wi-Fi/Bluetooth connection. * Ultra-low power sensor monitoring mode: the main system is in Deep-sleep mode, and the ULP coprocessor is turned on or off periodically to measure sensor data. According to the data measured by the sensor, the ULP coprocessor decides whether to wake up the main system. The power consumption changes with the power saving mode/sleep mode and the working status of the functional module (see Table 5). Table 5: Power consumption in different power saving modes | Power Saving Mode | Description | Power Consumption | | Active (RF working) | Wi-Fi Tx packet 13 dBm~21 dBm | 160~260 mA | | ::: | Wi-Fi/BT Tx packet 0 dBm | 120 mA | | ::: | Wi-Fi/BT Rx and listening | 80~90 mA | | ::: | Associated sleep mode (associated with Light-sleep mode) | 0.9 mA@DTIM3, 1.2 mA@DTIM1 | | Modem-sleep | CPU is working | Maximum speed: 20 mA | | ::: | ::: | Normal speed: 5~10 mA | | ::: | ::: | Slow speed: 3 mA | | Light-sleep |-| 0.8 mA | | Deep-sleep | ULP coprocessor is working | 0.5 mA | | ::: | Ultra-low power sensor monitoring method | 25 uA @1% duty | | ::: | RTC timer + RTC memory | 20uA | | Hibernation | Only the RTC timer is working | 2.5 uA | ==== 3.5 Peripheral interface ==== Table 6: Interface description 3) | Interface | Signal | Pin | Function | | ADC | ADC1_CH0 | SENSOR_VP | Two 12-bit SAR ADCs | | ::: | ADC1_CH3 | SENSOR_VN | ::: | | ::: | ADC1_CH4 | IO32 | ::: | | ::: | ADC1_CH5 | IO33 | ::: | | ::: | ADC1_CH6 | IO34 | ::: | | ::: | ADC1_CH7 | IO35 | ::: | | ::: | ADC2_CH0 | IO4 | ::: | | ::: | ADC2_CH1 | IO0 | ::: | | ::: | ADC2_CH2 | IO2 | ::: | | ::: | ADC2_CH3 | IO15 | ::: | | ::: | ADC2_CH4 | IO13 | ::: | | ::: | ADC2_CH5 | IO12 | ::: | | ::: | ADC2_CH6 | IO14 | ::: | | ::: | ADC2_CH7 | IO27 | ::: | | ::: | ADC2_CH8 | IO25 | ::: | | ::: | ADC2_CH9 | IO26 | ::: | | Ultra-low noise pre-analog amplifier | SENSOR_VP | IO36 | A larger capacitor on the PCB provides about 60 dB of gain to the ADC. | | ::: | SENSOR_VN | IO39 | ::: | | DAC | DAC_1 | IO25 | Two 8-bit DACs | | ::: | DAC_2 | IO26 | ::: | | Touch Sensor | TOUCH0 | IO4 | Capacitive Touch Sensor | | ::: | TOUCH1 | IO0 | ::: | | ::: | TOUCH2 | IO2 | ::: | | ::: | TOUCH3 | IO15 | ::: | | ::: | TOUCH4 | IO13 | ::: | | ::: | TOUCH5 | IO12 | ::: | | ::: | TOUCH6 | IO14 | ::: | | ::: | TOUCH7 | IO27 | ::: | | ::: | TOUCH8 | IO33 | ::: | | ::: | TOUCH9 | IO32 | ::: | | SDSDIO / MMC host controller | HS2_CLK | MTMS | SD card conforming to V3.01 standard | | ::: | HS2_CMD | MTDO | ::: | | ::: | HS2_DATA0 | IO2 | ::: | | ::: | HS2_DATA1 | IO4 | ::: | | ::: | HS2_DATA2 | MTDI | ::: | | ::: | HS2_DATA3 | MTCK | ::: | | Motor PWM | PWM0_OUT0~2 | Any GPIO | 3 channels of 16-bit timers generate PWM waveforms, each channel contains a pair of output signals. 3 fault detection signals. 3 even capture signals. 3 synchronization signals. | | ::: | PWM1_OUT_IN0~2 | ::: | ::: | | ::: | PWM0_FLT_IN0~2 | ::: | ::: | | ::: | PWM1_FLT_IN0~2 | ::: | ::: | | ::: | PWM0_CAP_IN0~2 | ::: | ::: | | ::: | PWM1_CAP_IN0~2 | ::: | ::: | | ::: | PWM0_SYNC_IN0~2 | ::: | ::: | | ::: | PWM1_SYNC_IN0~2 | ::: | ::: | | LED PWM | ledc_hs_sig_out0~7 | Any GPIO | 16 independent channels running on 80 MHz clock or RTC clock. Duty cycle accuracy: 16-bit. | | ::: | ledc_ls_sig_out0~7 | ::: | ::: | | UART | U0RXD_in | Any GPIO | Two UART devices with hardware flow control and DMA | | ::: | U0CTS_in | ::: | ::: | | ::: | U0DSR_in | ::: | ::: | | ::: | U0TXD_out | ::: | ::: | | ::: | U0RTS_out | ::: | ::: | | ::: | U0DTR_out | ::: | ::: | | ::: | U1RXD_in | ::: | ::: | | ::: | U1CTS_in | ::: | ::: | | ::: | U1TXD_out | ::: | ::: | | ::: | U1RTS_out | ::: | ::: | | ::: | U2RXD_in | ::: | ::: | | ::: | U2CTS_in | ::: | ::: | | ::: | U2TXD_out | ::: | ::: | | ::: | U2RTS_out | ::: | ::: | | I2C | I2CEXT0_SCL_in | Any GPIO | Two I2C devices, working in slave or master mode | | ::: | I2CEXT0_SDA_in | ::: | ::: | | ::: | I2CEXT1_SCL_in | ::: | ::: | | ::: | I2CEXT1_SDA_in | ::: | ::: | | ::: | I2CEXT0_SCL_out | ::: | ::: | | ::: | I2CEXT0_SDA_out | ::: | ::: | | ::: | I2CEXT1_SCL_out | ::: | ::: | | ::: | I2CEXT1_SDA_out | ::: | ::: | | I2S | I2S0I_DATA_in0~15 | Any GPIO | Used for serial stereo data input and output, parallel LCD data output | | ::: | I2S0O_BCK_in | ::: | ::: | | ::: | I2S0O_WS_in | ::: | ::: | | ::: | I2S0I_BCK_in | ::: | ::: | | ::: | I2S0I_WS_in | ::: | ::: | | ::: | I2S0I_H_SYNC | ::: | ::: | | ::: | I2S0I_V_SYNC | ::: | ::: | | ::: | I2S0I_H_ENABLE | ::: | ::: | | ::: | I2S0O_BCK_out | ::: | ::: | | ::: | I2S0O_WS_out | ::: | ::: | | ::: | I2S0I_BCK_out | ::: | ::: | | ::: | I2S0I_WS_out | ::: | ::: | | ::: | I2S0O_DATA_out0~23 | ::: | ::: | | ::: | I2S1I_DATA_in0~15 | ::: | ::: | | ::: | I2S1O_BCK_in | ::: | ::: | | ::: | I2S1O_WS_in | ::: | ::: | | ::: | I2S1I_BCK_in | ::: | ::: | | ::: | I2S1I_WS_in | ::: | ::: | | ::: | I2S1I_H_SYNC | ::: | ::: | | ::: | I2S1I_V_SYNC | ::: | ::: | | ::: | I2S1I_H_ENABLE | ::: | ::: | | ::: | I2S1O_BCK_out | ::: | ::: | | ::: | I2S1O_WS_out | ::: | ::: | | ::: | I2S1I_BCK_out | ::: | ::: | | ::: | I2S1I_WS_out | ::: | ::: | | ::: | I2S1O_DATA_out0~23 | ::: | ::: | | Infrared remote control | RMT_SIG_IN0~7 | Any GPIO | 8 IR transceivers, support different waveform standards | | ::: | RMT_SIG_OUT0~7 | ::: | ::: | | Parallel QSPI | SPIHD | SHD/SD2| Supports Standard SPI, Dual SPI and Quad SPI, and can connect to external Flash and SRAM| | ::: | SPIWP | SWP/SD3 | ::: | | ::: | SPICS0 | SCS/CMD | ::: | | ::: | SPICLK | SCK/CLK | ::: | | ::: | SPIQ | SDO/SD0 | ::: | | ::: | SPID | SDI/SD1 | ::: | | ::: | HSPICLK | IO14 | ::: | | ::: | HSPICS0 | IO15 | ::: | | ::: | HSPIQ | IO12 | ::: | | ::: | HSPID | IO13 | ::: | | ::: | HSPIHD | IO4 | ::: | | ::: | HSPIWP | IO2 | ::: | | ::: | VSPICLK | IO18 | ::: | | ::: | VSPICS0 | IO5 | ::: | | ===== 4. Electrical characteristics ===== Description: Unless otherwise specified, the test environment for the specifications listed in this chapter is: VBAT= 3.3V, TA= 27°C. ==== 4.1 Limit parameters ==== Table 7: Limit parameters | Rated Value | Condition | Value | Unit | | Storage temperature |-| -40~85 | °C| | Maximum soldering temperature |-| 260 | °C | | Supply voltage | IPC/JEDEC J-STD-020 | +2.2-+3.6 | V | ==== 4.2 Recommended working conditions ==== Table 8: Recommended working conditions | Working environment | Name | Minimum value | Typical value | Maximum value | Unit | | Operating temperature |-| -40 | 20 | 85 | °C | | Supply voltage | VDD | 2.2 | 3.3 | 3.6 | V | ==== 4.3 Digital port characteristics ==== Table 9: Digital port characteristics | Port | Name | Minimum | Typical Value | Maximum | Unit | | Input logic level is low | V/L | -0.3 |-| 0.25VDD | V | | Input logic level is high | | 0.75VDD |-| VDD+0.3 | V | | Output logic level low | VOL | N |-| 0.1VDD | V | | Output logic level is high | | 0.8VDD |-| N | V | ==== 4.4 Wi-Fi RF ==== Table 10: Wi-Fi radio frequency characteristics | Description | Minimum value | Typical value | Maximum value | Unit | | General Features ||||| | Input frequency | 2412 |-| 2484 | MHz | | Input impedance |-| 50 |-| Ω | | Input reflection |-|-| -10 | dB | | PA output power | 15.5 | 16.5 | 21.5 | dBm | | Sensitivity ||||| | DSSS, 1 Mbps |-| -98 |-| dBm | | CCK, 11 Mbps |-| -90 |-| dBm | | OFDM, 6 Mbps |-| -93 |-| dBm | | OFDM, 54 Mbps |-| -75 |-| dBm | | HT20, MCSO |-| -93 |-| dBm | | HT20, MCS7 |-| -73 |-| dBm | | HT40, MCSO |-| -90 |-| dBm | | HT40, MCS7 |-| -70 |-| dBm | | MCS32 |-| -91 |-| dBm | | Adjacent Channel Suppression ||||| | OFDM, 6 Mbps |-| 37 |-| dB | | OFDM, 54 Mbps |-| 21 |-| dB | | HT20, MCS0 |-| 37 |-| dB | | HT20, MCS7 |-| 20 |-| dB | ==== 4.5 Bluetooth low energy radio frequency ==== ===4.5.1 Receiver === Table 11: BLE receiver characteristics | Parameter | Condition | Minimum value | Typical value | Maximum value | Unit | | Sensitivity@0.1% BER |-|-| -98 |-| dBm | | Maximum received signal@0.1% BER |-| 0 |-|-| dBm | | Co-channel C/I |-|-| +10 |-| dB | | Adjacent channel selectivity C/I | F = F0 + 1 MHz |-| -5 |-| dB | | ::: | F = F0-1 MHz |-| -5 |-| dB | | ::: | F = F0 + 2 MHz |-| -25 |-| dB | | ::: | F = F0-2 MHz |-| -35 |-| dB | | ::: | F = F0 + 3 MHz |-| -25 |-| dB | | ::: | F = F0-3 MHz |-| -45 |-| dB | | Anti-band blocking performance | 30 MHz-2000 MHz | -10 |-|-| dBm | | ::: | 2000 MHz-2400 MHz | -27 |-|-| dBm | | ::: | 2500 MHz-3000 MHz | -27 |-|-| dBm | | ::: | 3000 MHz-12.5 GHz | -10 |-|-| dBm | | Intermodulation performance |-| -36 |-|-| dBm | ===4.5.2 Launcher=== Table 12: BLE transmitter characteristics | Parameter | Condition | Minimum | Typical Value | Maximum | Unit | | RF transmit power |-|-| +7.5 | +10 | dBm | | RF power control range |-|-| 25 |-| dB | | Adjacent channel transmit power | F = F0 + 1 MHz |-| -14.6 |-| dBm | | ::: | F = F0-1 MHz |-| -12.7 |-| dBm | | ::: | F = F0 + 2 MHz |-| -44.3 |-| dBm | | ::: | F = F0-2 MHz |-| -38.7 |-| dBm | | ::: | F = F0 + 3 MHz |-| -49.2 |-| dBm | | ::: | F = F0-3 MHz |-| -44.7 |-| dBm | | ::: | F = F0 +> 3 MHz |-| -50 |-| dBm | | ::: | F = F0→ 3 MHz |-| -50 |-| dBm | | ∆f1avg |-|-|-| 265 | kHz | | ∆f2max |-| 247 |-|-| kHz | | ∆f2avg/∆f1avg |-|-| -0.92 |-|-| | ICFT |-|-| -10 |-| kHz | | Frequency drift rate |-|-| 0.7 |-| kHz/50us | | Frequency drift |-|-| 2 |-| kHz | ==== 4.6 Reflow soldering temperature curve ==== Table 13: Reflow soldering temperature curve | Item | Value** |
| Heating rate TS maximum to TL | maximum 3°C/sec | |||||
| Warm up | ||||||
| Minimum temperature value (TS Min.) | 150°C | |||||
| Typical temperature value (TSTyp.) | 175°C | |||||
| Maximum temperature value (TS Max.) | 200°C | |||||
| Time (TS) | 60-180 seconds | |||||
| Heating rate (TL to TP) | Maximum 3°C/sec | |||||
| Duration: temperature (TL) / time (TL) | 217°C/60~150 seconds | |||||
| Peak temperature (TP) | Maximum temperature of 260°C for 10 seconds | |||||
| Peak target temperature (TP target value) | 260°C +0/-5°C | |||||
| Actual temperature peak (tP) 5°C duration | 20~40 seconds | |||||
| Cooling rate TS maximum to TL | maximum 6°C/sec | |||||
| Time required to adjust from 25°C to peak temperature (t) | Up to 8 minutes |
Description:
The 32 kHz on-board crystal oscillator is connected to GPIO32 and GPIO33 of ESP32. To use the ADC, Touch or GPIO functions of IO32 and IO33, you need to remove the 32 kHz crystal oscillator and its capacitors C13 and C17, and solder 0ohm resistors R5 and R6.
5. Schematic diagram
ESP32S circuit schematic diagram 4)
Appendix 1. Minimum system circuit
Appendix 2. Automatic programming circuit
Connect the EN and GPIO pins of the module to the DTR and RTS of the serial chip to achieve software control operation mode
1)
The high-temperature module that passed the 2000-hour reliability test at 125°C can be customized.
2)
The firmware can change the settings of “Built-in LDO (VDD_SDIO) voltage” and “SDIO slave signal input and output timing” after startup by configuring some register bits.
3)
The functions of motor PWM, LEDPWM, UART, I2C, I2S, universal SR and infrared remote control can be configured to any GPIO.
4)
The capacitance of C1 and C2 depends on the choice of crystal oscillator